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19-0767; Rev 2; 10/09
3A, 2MHz Step-Down Regulator with Integrated Switches
General Description
The MAX8643A high-efficiency switching regulator delivers up to 3A load current at output voltages from 0.6V to (0.9 x VIN). The IC operates from 2.35V to 3.6V, making it ideal for on-board point-of-load and postregulation applications. Total output error is less than 1% over load, line, and temperature. The MAX8643A features fixed-frequency PWM mode operation with a switching frequency range of 500kHz to 2MHz set by an external resistor. High-frequency operation allows for an all-ceramic capacitor design. The high operating frequency also allows for small-size external components. The low-resistance on-chip nMOS switches ensure high efficiency at heavy loads while minimizing critical inductances, making the layout a much simpler task with respect to discrete solutions. Following a simple layout and footprint ensures first-pass success in new designs. The MAX8643A comes with a high-bandwidth (> 14MHz) voltage-error amplifier. The voltage-mode control architecture and the voltage-error amplifier permit a type III compensation scheme to be utilized to achieve maximum loop bandwidth, up to 20% of the switching frequency. High loop bandwidth provides fast transient response, resulting in less required output capacitance and allowing for all-ceramic capacitor designs. The MAX8643A provides two three-state logic inputs to select one of nine preset output voltages. The preset output voltages allow customers to achieve 1% output-voltage accuracy without using expensive 0.1% resistors. In addition, the output voltage can be set to any customer value by either using two external resistors at the feedback with 0.6V internal reference or applying an external reference voltage to the REFIN input. The MAX8643A offers programmable soft-start time using one capacitor to reduce input inrush current. The MAX8643A is available in a lead-free, 24-pin, 4mm x 4mm thin QFN package.
Features
o Internal 37m RDSON MOSFETs o Continuous 3A Output Current o 1% Output Accuracy Over Load, Line, and Temperature o Operates from 2.35V to 3.6V Supply o Adjustable Output from 0.6V to (0.9 x VIN) o Soft-Start Reduces Inrush Supply Current o 500kHz to 2MHz Adjustable Switching Frequency o Compatible with Ceramic, Polymer, and Electrolytic Output Capacitors o VID-Selectable Output Voltages 0.6, 0.7, 0.8, 1.0, 1.2, 1.5, 1.8, 2.0, and 2.5V o Fully Protected Against Overcurrent and Overtemperature o Safe-Start into Prebiased Output o Sink/Source Current in DDR Applications o Lead-Free, 24-Pin, 4mm x 4mm Thin QFN Package
MAX8643A
Ordering Information
PART MAX8643AETG+ TEMP RANGE -40C to +85C PIN-PACKAGE 24 Thin QFN-EP*
MAX8643AETG/V+ -40C to +85C 24 Thin QFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. /V Denotes an automotive qualified part. *EP = Exposed pad.
Typical Operating Circuit
INPUT 2.4V, 3.6V IN BST
EN VDD
MAX8643A
LX OUT
OUTPUT 1.8V, 3A
Applications
POLs ASIC/CPU/DSP Core and I/O Voltages DDR Power Supplies Base-Station Power Supplies Telecom and Networking Power Supplies RAID Control Power Supplies
PGND CTL1 CTL2 FREQ REFIN SS COMP VDD FB
PREBIAS GND
PWRGD
Pin Configuration appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
3A, 2MHz Step-Down Regulator with Integrated Switches MAX8643A
ABSOLUTE MAXIMUM RATINGS
IN, VDD, PWRGD to GND ......................................-0.3V to +4.5V COMP, FB, REFIN, OUT, CTL_, EN, SS, FREQ to GND...................-0.3V to (VDD + 0.3V) LX Current (Note 1) .....................................................-4A to +4A BST to LX..................................................................-0.3V to +4V PGND to GND .......................................................-0.3V to +0.3V Continuous Power Dissipation (TA = +70C) 24-Pin TQFN-EP (derated 27.8mW/C above +70C)........................2222.2mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Note 1: LX has internal clamp diodes to GND and IN. Applications that forward bias these diodes should take care not to exceed the IC's package power dissipation limits.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = VDD = 3.3V, VFB = 0.5V, TA = -40C to +85C. Typical values are at TA = +25C, circuit of Figure 1, unless otherwise noted.) (Note 2)
PARAMETER IN/VDD IN and VDD Voltage Range IN Supply Current VDD Supply Current Total Shutdown Current from IN and VDD VDD Undervoltage Lockout Threshold BST BST Supply Current PWM COMPARATOR PWM Comparator Propagation Delay COMP COMP Clamp Voltage, High COMP Slew Rate PWM Ramp Amplitude COMP Shutdown Resistance ERROR AMPLIFIER Preset Output-Voltage Accuracy FB Regulation Accuracy Using External Resistors FB to OUT Resistor REFIN = SS -1 Select from Table 1 0.600 8 +1 % From COMP to GND, VEN = VSS = 0V VIN = 2.35V to 3.6V 2 1.4 1 8 V V/s V 10mV overdrive 20 ns VBST = VDD = VIN = 3.6V, VLX = 3.6V or 0V, VEN = 0V TA = +25C TA = +85C 10 5 A fS = 1MHz, no load (includes gate-drive current) fS = 1MHz VIN = 2.5V VIN = 3.3V VIN = 2.5V VIN = 3.3V 2.35 4 5.5 1.4 2 13 2 1.8 1.9 2 2.1 2.3 3.60 4.6 V mA mA A V s CONDITIONS MIN TYP MAX UNITS
VIN = VDD = VBST - VLX = 3.6V, VEN = 0V VDD rising LX starts/stops switching VDD falling Deglitching
CTL1 = CTL2 = GND All VID settings except CTL1 = CTL2 = GND
0.594 5
0.606 11
V k
2
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3A, 2MHz Step-Down Regulator with Integrated Switches
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VDD = 3.3V, VFB = 0.5V, TA = -40C to +85C. Typical values are at TA = +25C, circuit of Figure 1, unless otherwise noted.) (Note 2)
PARAMETER Open-Loop Voltage Gain Error-Amplifier Unity-Gain Bandwidth Error-Amplifier Common-Mode Input Range Error-Amplifier Minimum Output Current FB Input Bias Current CTL_ CTL_ Input Bias Current VCTL_ = 0V VCTL_ = VDD Rising High-Impedance Threshold Hysteresis REFIN REFIN Input Bias Current REFIN Common-Mode Range REFIN Offset Voltage LX (ALL PINS COMBINED) LX On-Resistance, High Side LX On-Resistance, Low Side LX Current-Limit Threshold ILX = -2A ILX = 2A VIN = 2.5V, high-side sourcing TA = +25C LX Leakage Current VIN = 3.6V, VEN = VSS = 0V TA = +85C LX Switching Frequency Frequency Range LX Minimum Off-Time LX Maximum Duty Cycle LX Minimum On-Time RMS LX Output Current 3 VIN = 2.5V to 3.3V RFREQ = 50k, VIN = 2.5V to 3.3V 93 VIN = 2.5V to 3.3V VLX = 0V VLX = 3.6V VLX = 0V VLX = 3.6V 0.9 1.8 500 40 96 80 1 1 1 2.0 1.1 2.2 2000 75 MHz kHz ns % ns A VIN = VBST - VLX = 2.5V VIN = VBST - VLX = 3.3V VIN = 2.5V VIN = 3.3V 4 -2 +2 A 39 37 36 34 5.5 55 58 m m A VREFIN = 0.6V VDD = 2.3V to 2.6V VDD = 2.6V to 3.6V CTL1 = CTL2 = GND, TA = +25C TA = +25C -500 0 0 -3 -100 VDD - 1.65 VDD - 1.7 +3 nA V mV Falling All VID transitions VDD - 1.2V 50 -7 +7 0.75 V mV A CONDITIONS 1k from COMP to GND Parallel 10k, 40pF from COMP to GND (Note 3) VDD = 2.35V to 2.6V VDD = 2.6V to 3.6V VCOMP = 1V VFB = 0.7V, CTL1 = CTL2 = Sourcing Sinking TA = +25C 14 0 0 1000 -500 -200 -40 MIN TYP 115 26 VDD - 1.65 VDD - 1.7 MAX UNITS dB MHz V A nA
MAX8643A
RFREQ = 50k RFREQ = 23.2k
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3A, 2MHz Step-Down Regulator with Integrated Switches MAX8643A
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VDD = 3.3V, VFB = 0.5V, TA = -40C to +85C. Typical values are at TA = +25C, circuit of Figure 1, unless otherwise noted.) (Note 2)
PARAMETER ENABLE EN Input Logic-Low, Falling EN Input Logic-High, Rising EN Hysteresis EN, Input Current SS SS Charging Current SS Discharge Resistance THERMAL SHUTDOWN Thermal-Shutdown Threshold Thermal-Shutdown Hysteresis POWER-GOOD (PWRGD) Power-Good Threshold Voltage Power-Good Falling-Edge Deglitch PWRGD Output-Voltage Low PWRGD Leakage Current OVERCURRENT LIMIT Current-Limit Startup Blanking Restart Time 128 1024 Clock cycles Clock cycles IPWRGD = 4mA VDD = VPWRGD = 3.6V, VFB = 0.9V VFB falling, 3mV hysteresis 87 90 48 0.03 0.01 0.15 93 % Clock cycles V A +165 20 C C VSS = 0.45V 7 8 500 9 A VEN = 0V or 3.6V, VDD = 3.6V TA = +25C TA = +85C 0.01 1.7 1.2 1.4 200 1 0.7 V V mV A CONDITIONS MIN TYP MAX UNITS
Note 2: Specifications are 100% production tested at TA = +25C. Limits over the operating temperature range are guaranteed by design and characterization. Note 3: Guaranteed by design.
Typical Operating Characteristics
(Typical values are at VIN = VDD = 3.3V, VOUT = 1.8V, RFREQ = 50k, IOUT = 3A, and TA = +25C, unless otherwise noted.)
EFFICIENCY vs. OUTPUT CURRENT
MAX8643A toc01
EFFICIENCY vs. OUTPUT CURRENT
95 90 EFFICIENCY (%) 85 80 75 70 VOUT = 1.2V VIN = VDD = 2.5V 0.1 1 OUTPUT CURRENT (A) 10 VOUT = 1.88V VOUT = 1.5V
MAX8643A toc02
100 90 80 70 60 50 VIN = VDD = 3.3V 40 0.1 1 OUTPUT CURRENT (A) VOUT = 1.8V VOUT = 1.2V VOUT = 2.5V
100
EFFICIENCY (%)
65 60 10
4
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3A, 2MHz Step-Down Regulator with Integrated Switches
Typical Operating Characteristics (continued)
(Typical values are at VIN = VDD = 3.3V, VOUT = 1.8V, RFREQ = 50k, IOUT = 3A, and TA = +25C, unless otherwise noted.)
EFFICIENCY vs. OUTPUT CURRENT
MAX8643A toc03
MAX8643A
FREQUENCY vs. INPUT VOLTAGE
MAX8643A toc04
LOAD REGULATION
-0.02 OUTPUT VOLTAGE CHARGE (%) -0.04 -0.06 -0.08 -0.10 -0.12 -0.14 -0.16 VOUT = 1.2V 0 1 2 3 LOAD CURRENT (A) 4 5 VOUT = 1.8V VIN = VDD = 3.3V VOUT = 2.5V
MAX8643A toc05
100 95 90
0
1950 1800 FREQUENCY (kHz) 1650 1500 1350 1200 -40C 1050 900 +25C +85C -40C +25C +85C
EFFICIENCY (%)
85 VOUT = 1.8V 80 VOUT = 1.5V 75 70 65 60 0.1 VOUT = 1.2V VIN = 2.5V VDD = 3.3V 1 OUTPUT CURRENT (A) 10
2.2
2.6
3.0 3.4 INPUT VOLTAGE (V)
3.8
LOAD TRANSIENT
MAX8643A toc06
SWITCHING WAVEFORMS
MAX8643A toc07
VIN = VDD = 3.3V VOUT AC-COUPLED 50mV/div VOUT AC-COUPLED 20mV/div 2A/div ILX 0A IOUT 1A/div 0A 40s/div 100ns/div VLX 2V/div 0V
SOFT-START WAVEFORMS
MAX8643A toc08
SHUTDOWN WAVEFORMS
MAX8643A toc09
VEN
2V/div 0V
VEN
2V/div 0V
VOUT VOUT RLOAD = 1 400s/div 1V/div 0V RLOAD = 1 10s/div
1V/div 0V
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3A, 2MHz Step-Down Regulator with Integrated Switches MAX8643A
Typical Operating Characteristics (continued)
(Typical values are at VIN = VDD = 3.3V, VOUT = 1.8V, RFREQ = 50k, IOUT = 3A, and TA = +25C, unless otherwise noted.)
INPUT CURRENT vs. INPUT VOLTAGE
MAX8643A toc10
CURRENT LIMIT vs. OUTPUT VOLTAGE
MAX8643A toc11
HICCUP CURRENT LIMIT
MAX8643A toc12
10 9 8 INPUT CURRENT (A) 7 6 5 4 3 2 1 0 2.2 2.4 2.6 2.8 3.0 3.2 INPUT VOLTAGE (V) 3.4 VEN = 0V
7 6 CURRENT LIMIT (A) 5 4
VOUT
1V/div 0V
IOUT 3 2 1 0 IIN
5A/div 0A
1A/div 0A 0.5 1.0 1.5 2.0 OUTPUT VOLTAGE (V) 2.5 400s/div
3.6
RMS INPUT CURRENT DURING SHORT CIRCUIT vs. INPUT VOLTAGE (C4 = 0.022F)
0.45 0.40 RMS INPUT CURRENT (A) 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 2.0 2.5 3.0 3.5 INPUT VOLTAGE (V) 4.0 VOUT = 0V
MAX8643A toc13
EXPOSED PAD TEMPERATURE vs. AMBIENT TEMPERATURE
MAX8643A toc14
FEEDBACK VOLTAGE vs. TEMPERATURE
0.63 FEEDBACK VOLTAGE (V) 0.62 0.61 0.60 0.59 0.58 0.57
MAX8643A toc15
0.50
110 100 EXPOSED PAD TEMPERATURE (C) 90 80 70 60 50 40 30 20 10 0 20 40 60 TEMPERATURE (C) 80 MEASURED ON A MAX8643EVKIT VOUT = 1.8V 3A LOAD
0.64
0.56 100 -40 -15 10 35 TEMPERATURE (C) 60 85
SOFT-START WITH REFIN
MAX8643A toc16
STARTING INTO PREBIAS OUTPUT
MAX8643A toc17
2V/div IIN 1A/div 0A VREFIN 0.5V/div 0V 1V/div 0V 2V/div 0V 200s/div 100s/div CSS = 6800pF, CO = 122F, L = 0.56H, VOUT = 2.5V VOUT VEN 0V
1V/div 0V
VOUT
VPWRGD
2V/div 0V
VPWRGD
6
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3A, 2MHz Step-Down Regulator with Integrated Switches
Pin Description
PIN 1 2 3, 4 NAME PREBIAS VDD CTL1, CTL2 REFIN FUNCTION Leave pin unconnected to prevent discharging of output capacitor during soft-start. Connect to GND otherwise. (See the Soft-Starting into a Prebiased Output section.) Supply Voltage and Bypass Input. Connect VDD to IN with a 10 resistor. Connect a 1F ceramic capacitor from VDD to GND. Preset Output Voltage Selection Input. CTL1 and CTL2 set the output voltage to one of nine preset voltages. See Table 1 for preset voltages. External Reference Input. Connect REFIN to SS to use the internal 0.6V reference. Connecting REFIN to an external reference voltage forces FB to regulate the voltage applied to REFIN. REFIN is internally pulled to GND when the IC is in shutdown mode. Soft-Start Input. Connect a capacitor from SS to GND to set the startup time. See the Soft-Start and REFIN section for details on setting the soft-start time. Analog Circuit Ground Output of the Voltage-Error Amplifier. Connect the necessary compensation network from COMP to FB. COMP is internally pulled to GND when the IC is in shutdown mode. Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to GND to set the output voltage from 0.6V to 90% of VIN. Connect FB through an RC network to the output when using CTL1 and CTL2 to select any of nine preset voltages. Output Voltage Sense. Connect to the output. Leave OUT unconnected when an external resistor-divider is used. Oscillator Frequency Selection. Connect a resistor from FREQ to GND to select the switching frequency. Power-Good Output. Open-drain output that is high impedance when VFB 90% of VREFIN or 0.6V. PWRGD is internally pulled low when VFB falls below 90% of its regulation point. PWRGD is internally pulled low when the IC is in shutdown mode, VDD or VIN is below the UVLO threshold, or the IC is in thermal shutdown. High-Side MOSFET Driver Supply. Bypass BST to LX with a 0.1F capacitor. Inductor Connection. All LX pins are internally connected together. Connect all LX pins to the output inductor. LX is high impedance when the IC is in shutdown mode. Power Ground. Connect all PGND pins externally to the power ground plane. Power-Supply Input. Input supply range is from 2.35V to 3.6V. Bypass with 22F ceramic capacitance to PGND externally. See the Typical Application Circuit. Enable Input. Logic input to enable/disable the MAX8643A. Exposed Paddle. Connect to a large ground plane to optimize thermal performance.
MAX8643A
5
6 7 8
SS GND COMP
9
FB
10 11 12 13 14, 15, 16 17-20 21, 22, 23 24 --
OUT FREQ PWRGD BST LX PGND IN EN EP
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3A, 2MHz Step-Down Regulator with Integrated Switches MAX8643A
Block Diagram
VDD
MAX8643A
EN
SHUTDOWN CONTROL
UVLO CIRCUITRY
CURRENT-LIMIT COMPARATOR BIAS GENERATOR
LX ILIM THRESHOLD BST IN
VOLTAGE REFERENCE
BST CAPACITOR CHARGING SWITCH
SS
SOFT-START
CONTROL LOGIC IN THERMAL SHUTDOWN
LX
REFIN OUT 8k FB CTL1 CTL2 VID VOLTAGECONTROL CIRCUITRY ERROR AMPLIFIER PWM COMPARATOR
PGND
PREBIAS
1VP-P OSCILLATOR
FREQ
COMP SHDN COMP LOW DETECTOR FB 0.9 x VREFIN GND PWRGD
8
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3A, 2MHz Step-Down Regulator with Integrated Switches
Typical Application Circuit
INPUT 2.4V TO 3.6V C1 22F C3 0.1F VDD 2 C5 1F R2 10k 24 C6 0.01F 3 4 5 EN 23 22 21 IN IN IN U1 BST 13 C9 0.1F 16 15 14 10 20 19 18, 17 7 9 R4 18k VDD R6 100 1% C10 1500pF C2 100F C4 0.01F C14 22F R10 2.2 L1 0.56H C15 1000pF
MAX8643A
R1 10
MAX8643A
VDD
LX LX LX OUT PGND PGND PGND GND
OUTPUT 1.8V/3A
CTL1 CTL2 REFIN
FB
COMP
8
C11 560pF
6 C8 6800pF
SS PREBIAS 1 GND 7
PWRGD FREQ
12 11 R7 24k 1%
C12 10pF R5 20k
Figure 1. 1MHz, All-Ceramic Capacitor Design with VOUT = 1.8V
Detailed Description
The MAX8643A high-efficiency, voltage-mode switching regulator is capable of delivering up to 3A of output current. The MAX8643A provides output voltages from 0.6V to (0.9 x VIN) from 2.35V to 3.6V input supplies, making it ideal for on-board point-of-load applications. The output voltage accuracy is better than 1% over load, line, and temperature. The MAX8643A features a wide switching frequency range, allowing the user to achieve all-ceramic capacitor designs and fast transient responses. The high operating frequency minimizes the size of external components. The MAX8643A is available in a small (4mm x 4mm), lead-free, 24-pin thin QFN package. The REFIN function makes the MAX8643A an ideal candidate for DDR and tracking power supplies. Using internal low-RDSON (37m) n-channel MOSFETs for both high- and low-side switches maintains high efficiency at both heavy-load and high-switching frequencies. The MAX8643A employs voltage-mode control architecture with a high-bandwidth (> 14MHz) error amplifier. The voltage-mode control architecture allows up to 2MHz switching frequency, reducing board area. The op-amp voltage-error amplifier works with type III com-
pensation to fully utilize the bandwidth of the high-frequency switching to obtain fast transient response. Adjustable soft-start time provides flexibilities to minimize input startup inrush current. An open-drain, power-good (PWRGD) output goes high when V FB reaches 90% of VREFIN or 0.54V.
Controller Function
The controller logic block is the central processor that determines the duty cycle of the high-side MOSFET under different line, load, and temperature conditions. Under normal operation, where the current-limit and temperature protection are not triggered, the controller logic block takes the output from the PWM comparator and generates the driver signals for both high-side and low-side MOSFETs. The break-before-make logic and the timing for charging the bootstrap capacitors are calculated by the controller logic block. The error signal from the voltage-error amplifier is compared with the ramp signal generated by the oscillator at the PWM comparator and, thus, the required PWM signal is produced. The high-side switch is turned on at the beginning of the oscillator cycle and turns off when the ramp voltage exceeds the VCOMP signal or the current-limit threshold is exceeded. The low-side switch is then turned on for the remainder of the oscillator cycle.
9
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3A, 2MHz Step-Down Regulator with Integrated Switches MAX8643A
Current Limit
The internal, high-side MOSFET has a typical 5.5A peak current-limit threshold. When current flowing out of LX exceeds this limit, the high-side MOSFET turns off and the synchronous rectifier turns on. The synchronous rectifier remains on until the inductor current falls below the low-side current limit. This lowers the duty cycle and causes the output voltage to droop until the current limit is no longer exceeded. The MAX8643A uses a hiccup mode to prevent overheating during short-circuit output conditions. During current limit if V FB drops below 420mV and stays below this level for 12s or more, the part enters hiccup mode. The high-side MOSFET and the synchronous rectifier are turned off and both COMP and REFIN are internally pulled low. If REFIN and SS are connected together, then both are pulled low. The part remains in this state for 1024 clock cycles and then attempts to restart for 128 clock cycles. If the fault-causing current limit has cleared, the part resumes normal operation. Otherwise, the part reenters hiccup mode again.
Undervoltage Lockout (UVLO)
The UVLO circuitry inhibits switching when V DD is below 2V (typ). Once VDD rises above 2V (typ), UVLO clears and the soft-start function activates. A 100mV hysteresis is built in for glitch immunity.
BST
The gate-drive voltage for the high-side, n-channel switch is generated by a flying-capacitor boost circuit. The capacitor between BST and LX is charged from the VIN supply while the low-side MOSFET is on. When the low-side MOSFET is switched off, the voltage of the capacitor is stacked above LX to provide the necessary turn-on voltage for the high-side internal MOSFET.
Frequency Select (FREQ)
The switching frequency is resistor programmable from 500kHz to 2MHz. Set the switching frequency of the IC with a resistor (RFREQ) connected from FREQ to GND. RFREQ is calculated as: RFREQ = 50k 0.95s x( 1 fS - 0.05s)
Soft-Start and REFIN
The MAX8643A utilizes an adjustable soft-start function to limit inrush current during startup. An 8A (typ) current source charges an external capacitor connected to SS. The soft-start time is adjusted by the value of the external capacitor from SS to GND. The required capacitance value is determined as: C= 8A x t SS 0.6V
where fS is the desired switching frequency in Hz.
Power-Good Output (PWRGD)
PWRGD is an open-drain output that goes high impedance when VFB is above 0.9 x VREFIN. PWRGD pulls low when VFB is below 90% of its regulation for at least 48 clock cycles. PWRGD is low during shutdown.
Programming the Output Voltage (CTL1, CTL2)
As shown in Table 1, the output voltage is pin programmable by the logic states of CTL1 and CTL2. CTL1 and CTL2 are tri-level inputs: VDD, unconnected, and GND.
where tSS is the required soft-start time in seconds. The MAX8643A also features an external reference input (REFIN). The IC regulates FB to the voltage applied to REFIN. The internal soft-start is not available when using an external reference. A method of soft-start when using an external reference is shown in Figure 2. Connect REFIN to SS to use the internal 0.6V reference.
Table 1. CTL1 and CTL2 Output Voltage Selection
CTL1 GND CTL2 GND VDD Unconnected VDD GND Unconnected VDD GND Unconnected VOUT (V) 0.6 0.7 0.8 1.0 1.2 1.5 1.8 2.0 2.5
R1 REFIN R2 C
VDD GND GND
MAX8643A
Unconnected Unconnected Unconnected VDD
Figure 2. Typical Soft-Start Implementation with External Reference
VDD
10
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3A, 2MHz Step-Down Regulator with Integrated Switches
The logic states of CTL1 and CTL2 should be programmed only before power-up. Once the part is enabled, CTL1 and CTL2 should not be changed. If the output voltage needs to be reprogrammed, cycle power or EN and reprogram before enabling. put ripple occurs due to variations in the charge stored in the output capacitor, the voltage drop due to the capacitor's ESR, and the voltage drop due to the capacitor's ESL. Calculate the output voltage ripple due to the output capacitance, ESR, and ESL: VRIPPLE = VRIPPLE(C) + VRIPPLE(ESR) + VRIPPLE(ESL) where the output ripple due to output capacitance, ESR, and ESL is: IP-P VRIPPLE(C) = 8 x COUT x fS VRIPPLE(ESR) = IP-P x ESR I VRIPPLE(ESL) = P-P x ESL t ON I VRIPPLE(ESL) = P-P x ESL t OFF or whichever is larger. The peak inductor current (IP-P) is: V - VOUT V IP-P = IN x OUT fS x L VIN Use these equations for initial capacitor selection. Determine final values by testing a prototype or an evaluation circuit. A smaller ripple current results in less output voltage ripple. Since the inductor ripple current is a factor of the inductor value, the output voltage ripple decreases with larger inductance. Use ceramic capacitors for low ESR and low ESL at the switching frequency of the converter. The ripple voltage due to ESL is negligible when using ceramic capacitors. Load-transient response depends on the selected output capacitance. During a load transient, the output instantly changes by ESR x ILOAD. Before the controller can respond, the output deviates further, depending on the inductor and output capacitor values. After a short time, the controller responds by regulating the output voltage back to its predetermined value. The controller response time depends on the closed-loop bandwidth. A higher bandwidth yields a faster response time, preventing the output from deviating further from its regulating value. See the Compensation Design section for more details.
MAX8643A
Shutdown Mode
Drive EN to GND to shut down the IC and reduce quiescent current to less than 12A. During shutdown, the LX is high impedance. Drive EN high to enable the MAX8643A.
Thermal Protection
Thermal-overload protection limits total power dissipation in the device. When the junction temperature exceeds TJ = +165C, a thermal sensor forces the device into shutdown, allowing the die to cool. The thermal sensor turns the device on again after the junction temperature cools by 20C, causing a pulsed output during continuous overload conditions. The soft-start sequence begins after recovery from a thermal-shutdown condition.
Applications Information
IN and VDD Decoupling To decrease the noise effects due to the high switching frequency and maximize the output accuracy of the MAX8643A, decouple VIN with a 22F capacitor from VIN to PGND. Also decouple VDD with a 1F from VDD to GND. Place these capacitors as close to the IC as possible. Inductor Selection
Choose an inductor with the following equation: L= VOUT x (VIN - VOUT ) fS x VIN x LIR x IOUT(MAX)
where LIR is the ratio of the inductor ripple current to full load current at the minimum duty cycle. Choose LIR between 20% to 40% for best performance and stability. Use an inductor with the lowest possible DC resistance that fits in the allotted dimensions. Powdered iron ferrite core types are often the best choice for performance. With any core material, the core must be large enough not to saturate at the current limit of the MAX8643A.
Output-Capacitor Selection
The key selection parameters for the output capacitor are capacitance, ESR, ESL, and voltage-rating requirements. These affect the overall stability, output ripple voltage, and transient response of the DC-DC converter. The out-
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3A, 2MHz Step-Down Regulator with Integrated Switches MAX8643A
Input-Capacitor Selection
The input capacitor reduces the current peaks drawn from the input power supply and reduces switching noise in the IC. The total input capacitance must be equal to or greater than the value given by the following equation to keep the input ripple voltage within specs and minimize the high-frequency ripple current being fed back to the input source: CIN _ MIN = D x t S x IOUT VIN - RIPPLE parallel, the value of the ESR in the above equation is equal to that of the ESR of a single output capacitor divided by the total number of output capacitors. The high switching frequency range of the MAX8643A allows the use of ceramic output capacitors. Since the ESR of ceramic capacitors is typically very low, the frequency of the associated transfer function zero is higher than the unity-gain crossover frequency, fC, and the zero cannot be used to compensate for the double pole created by the output filtering inductor and capacitor. The double pole produces a gain drop of 40dB/decade and a phase shift of 180/decade. The error amplifier must compensate for this gain drop and phase shift to achieve a stable high-bandwidth closed-loop system. Therefore, use type III compensation as shown in Figure 3 and Figure 4. Type III compensation possesses three poles and two zeros with the first pole, fP1_EA, located at zero frequency (DC). Locations of other poles and zeros of the type III compensation are given by: fZ2 _ EA = 1 2 x R3 x C3
L LX COUT VOUT
where VIN-RIPPLE is the maximum allowed input ripple voltage across the input capacitors and is recommended to be less than 2% of the minimum input voltage. D is the duty cycle (VOUT/VIN), and tS is the switching period (1/fS). The impedance of the input capacitor at the switching frequency should be less than that of the input source so high-frequency switching currents do not pass through the input source but are instead shunted through the input capacitor. High source impedance requires high input capacitance. The input capacitor must meet the ripple current requirement imposed by the switching currents. The RMS input ripple current is given by: IRIPPLE = ILOAD x VOUT x (VIN - VOUT ) VIN
MAX8643A
OUT FB R1 CTL2 COMP C2 C1
R3
R2 C3
where IRIPPLE is the input RMS ripple current.
CTL1
Compensation Design
The power transfer function consists of one double pole and one zero. The double pole is introduced by the output filtering inductor, L, and the output filtering capacitor, CO. The ESR of the output filtering capacitor determines the zero. The double pole and zero frequencies are given as follows: fP1_ LC = fP2 _ LC = 1 R + ESR 2 x L x C O x O RO + RL 1 2 x ESR x CO
VOLTAGE SELECT
R4
a) EXTERNAL RESISTOR-DIVIDER
L LX COUT
VOUT
MAX8643A
OUT
R2
fZ _ ESR =
R3 8k FB CTL1 CTL2 COMP C2
C3
where RL is equal to the sum of the output inductor's DCR and the internal switch resistance, RDSON. A typical value for RDSON is 37m. RO is the output load resistance, which is equal to the rated output voltage divided by the rated output current. ESR is the total equivalent series resistance of the output filtering capacitor. If there is more than one output capacitor of the same type in
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R1
C1
b) INTERNAL PRESET VOLTAGE
Figure 3. Type III Compensation Network
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3A, 2MHz Step-Down Regulator with Integrated Switches
COMPENSATION TRANSFER FUNCTION DOUBLE POLE GAIN (dB) POWER-STAGE TRANSFER FUNCTION SECOND POLE OPEN-LOOP GAIN THIRD POLE
Due to the underdamped nature of the output LC double pole, set the two zero frequencies of the type III compensation less than the LC double-pole frequency to provide adequate phase boost. Set the two zero frequencies to 80% of the LC double-pole frequency. Hence: R1 = 1 0.8 x C1 1 0.8 x R 3 x x L x CO x (RO + ESR) RL + RO L x CO x (RO + ESR) RL + RO
MAX8643A
FIRST AND SECOND ZEROS
C3 =
Figure 4. Type III Compensation Illustration
Setting the second compensation pole, f P2_EA , at fZ_ESR yields: R2 = CO x ESR C3
fZ2 _ EA = fP3 _ EA = fP2 _ EA =
1 2 x R3 x C3 1 2 x R1 x C2
1 2 x R2 x C3
The above equations are based on the assumptions that C1>>C2, and R3>>R2, which are true in most applications. Placements of these poles and zeros are determined by the frequencies of the double pole and ESR zero of the power transfer function. It is also a function of the desired closed-loop bandwidth. The following section outlines the step-by-step design procedure to calculate the required compensation components for the MAX8643A. When the output voltage of the MAX8643A is programmed to a preset voltage, R3 is internal to the IC and R4 does not exist (Figure 3b). When externally programming the MAX8643A (Figure 3a), the output voltage is determined by: R4 =
Set the third compensation pole at 1/2 of the switching frequency to gain some phase margin. Calculate C2 as follows: 1 C2 = x R1 x fS x 2 The above equations provide accurate compensation when the zero-cross frequency is significantly higher than the double-pole frequency. When the zero-cross frequency is near the double-pole frequency, the actual zero-cross frequency is higher than the calculated frequency. In this case, lowering the value of R1 reduces the zero-cross frequency. Also, set the third pole of the type III compensation close to the switching frequency if the zero-cross frequency is above 200kHz to boost the phase margin. The recommended range for R3 is 2k to 10k. Note that the loop compensation remains unchanged if only R4's resistance is altered to set different outputs.
(VOUT - 0.6)
0.6 x R3
Soft-Starting into a Prebiased Output
When the PREBIAS pin is left unconnected, the MAX8643A is capable of soft-starting up into a prebiased output without discharging the output capacitor. This type of operation is also termed monotonic startup. However, in order to avoid output voltage glitches during soft-start, it should be ensured that the inductor current is in continuous conduction mode during the end of the soft-start period. This is done by satisfying the following equation: V I CO x O P-P 2 t SS
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The zero-cross frequency of the closed-loop, fC, should be between 10% and 20% of the switching frequency, fS. A higher zero-cross frequency results in faster transient response. Once fC is chosen, C1 is calculated from the following equation: C1 = 1.5625 VIN R 2 x x R3 x (1 + L ) x fC RO
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3A, 2MHz Step-Down Regulator with Integrated Switches
where CO is the output capacitor, VO is the output voltage, tSS is the soft-start time set by the soft-start capacitor CSS, and IP-P is the peak-to-peak inductor ripple current (as defined in the Output Capacitor Selection section). Depending on the application, one of these parameters may drive the selection of the others. See the Starting into Prebias Output waveforms in the Typical Operating Characteristics section for an example selection of the above parameters. Connecting the PREBIAS pin to GND disables the prebias soft-start feature and causes the MAX8643A to discharge any voltage present on the output capacitors and then commence its soft-start.
MAX8643A
4) Connect IN, LX, and PGND separately to a large copper area to help cool the IC to further improve efficiency and long-term reliability. 5) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the IC as possible. 6) Route high-speed switching nodes, such as LX, away from sensitive analog areas (FB, COMP).
Pin Configuration
TOP VIEW
PGND PGND LX BST 13 12 PWRGD 11 FREQ 10 OUT LX 15 LX 14
PCB Layout Considerations and Thermal Performance
Careful PCB layout is critical to achieve clean and stable operation. It is highly recommended to duplicate the MAX8643 EV kit layout for optimum performance. If deviation is necessary, follow these guidelines for good PCB layout: 1) Connect input and output capacitors to the power ground plane; connect all other capacitors to the signal ground plane. 2) Place capacitors on VDD, VIN, and SS as close as possible to the IC and its corresponding pin using direct traces. Keep power ground plane (connected to PGND) and signal ground plane (connected to GND) separate. 3) Keep the high-current paths as short and wide as possible. Keep the path of switching current short and minimize the loop area formed by LX, the output capacitors, and the input capacitors.
18 PGND 19 PGND 20 IN 21 IN 22 IN 23 EN 24
17
16
MAX8643A
*EP
9 8
FB COMP GND
+
1 PREBIAS 2 VDD 3 CTL1 4 CTL2 5 REFIN 6 SS
7
THIN QFN
*EP = EXPOSED PAD.
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3A, 2MHz Step-Down Regulator with Integrated Switches
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 24 TQFN-EP PACKAGE CODE T2444+4 DOCUMENT NO. 21-0139
MAX8643A
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3A, 2MHz Step-Down Regulator with Integrated Switches MAX8643A
Revision History
REVISION NUMBER 0 1 2 REVISION DATE 3/07 9/07 10/09 Initial release Updated Features, Electrical Characteristics, Figure 1, and Controller Function section. Added MAX8643A automotive package to Ordering Information. DESCRIPTION PAGES CHANGED -- 1, 2, 4, 8, 9, 13 1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

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